About

Shiva Teja Vadla is a highly experienced Physical Design Engineer with a track record of successful ASIC Designs. He currently works as a Staff Engineer at Western Digital, where he specializes in PnR, STA, EM, IR and PDV closure. Shiva has a strong background in low power PD implementation and has contributed to several successful tape-outs for lower technology nodes. Prior to joining Western Digital, Shiva worked as a Senior ASIC Design Engineer (Physical Design) at Open-Silicon and as a Physical Design Engineer at Intel. With almost 8 years of relevant experience, he has gained a deep understanding of the industry and has honed his skills in the field of Physical Design. Shiva holds a Bachelor of Technology (B.Tech.) degree in Electronics and Communications Engineering from CVR College of Engineering. He has a strong technical background and is well-versed in a variety of tech stacks, including Senior Software Engineer. Overall, Shiva is a highly skilled Physical Design Engineer with a proven track record of delivering successful ASIC Designs. He is a valuable asset to any organization and is constantly seeking new challenges to further develop his skills.